The present invention relates to a circuit for detecting short-circuiting of inductive load drive devices, in particular, of the device output to the supply line. Such devices are used, for example, for driving automotive electronic fuel injectors.
In electronic injection systems, fuel supply is enabled by means of an electronically controlled valve, operation of which is controlled by the magnetic field produced by an electromagnet roughly describable as an inductor wound about a core and to which a control current is supplied.
To reduce power dissipation, control is effected in two phases: a first phase requiring a strong magnetic field for opening the valve (peak phase); and a second phase in which the valve is kept open (hold phase).
FIG. 1 shows a rough half line graph of the control current I.sub.L of an injector. As can be seen, the peak phase extends up to instant t.sub.1, with current I.sub.L increasing up to a maximum value I.sub.p. This is followed by phase t.sub.1 -t.sub.2, in which the current falls sharply, and, from t.sub.2 onwards, the actual hold phase, chopped to prevent active elements from operating in a linear zone to reduce power dissipation.
One problem for control devices of the aforementioned type is the detection of short-circuiting between the device output and the supply line, and supply of this information to further devices, such as the microprocessor controlling the electronic injection system as a whole.
In previously known circuits, short-circuiting as described above is diagnosed by the passage of a strong (short-circuit) current through the detecting circuit, as shown schematically in FIG. 2, in which the electromagnet controlling the injector valve is shown schematically by an inductor L and a resistor R, the current of which is controlled by a device 1 via a controlled power switch 2. The dotted line 8 indicates the short-circuit. An inductor L is series-connected to a sensing resistor 3, which measures the current in the inductor and is connected to a comparator 4. This compares the rise in voltage of resistor 3 with a reference value V.sub.REF, and, when the two values match, switches to produce a short-circuit output signal.
Though straightforward in principle, the above solution is poorly reliable and difficult to implement in practice, due to the diagnosis of the short-circuit on the basis of a single reference value, which is obviously difficult to establish accurately.
For a clearer understanding of the problem, the control device referred to (the basic design of which is described, for example, in Italian Patent Application No. 68037A/90, filed on Dec. 21, 1990 by the present Applicant) will be described in more detail with reference to FIG. 3.
As shown in FIG. 3, the inductor L is connected between the supply line V.sub.CC, constituting a reference potential line, and ground via a switch 2, in this case, a DMOS transistor. In particular, the drain terminal of transistor 2 is connected to inductor L, and defines the output point T of the control device, while its source terminal is grounded via the sensing resistor 3. The mid point V between the transistor 2 and resistor 3 is connected to a first input of three comparators 5, 6, 7, i.e., to the non-inverting inputs of the comparators 5 and 6, and the inverting input of the comparator 7. The inverting inputs of comparators 5 and 6 are connected to respective reference voltage sources 9 and 10, and the non-inverting input of comparator 7 to the source 11. The source 9 supplies a voltage V.sub.1 equal to that at the terminals of resistor 3 when supplied with current I.sub.P ; the source 10 a voltage V.sub.2 corresponding to current I.sub.HH (high-level hold current); and the source a voltage V.sub.3 corresponding to current I.sub.HL (low-level hold current).
The mid-point T between the inductor L and power switch 2 is connected to the cathode of a Zener diode 18, the anode of which is series-connected to the emitter of a PNP transistor 20. The transistor 20 has its base connected to supply line V.sub.CC, and its collector connected directly to the control terminal of the switch 2, and grounded via a resistor 21. The diode 18 and the base-emitter junction of transistor 20 define a current recirculating branch (free-wheeling branch) forming part of a loop comprising a second branch including the base-emitter junction of transistor 20 and the line to the control terminal of the switch 2, as explained in more detail later on. The control terminal of switch 2, point P, is also connected to the drain terminal of a MOS P-channel transistor 22, the source terminal of which is connected to the supply line V.sub.CC, and the gate terminal of which is connected to the supply line via a resistor 23.
The point T is also connected to a power recirculating unit 26 formed by a first NPN transistor 15 having its collector connected to the point T, and its emitter to the supply line V.sub.CC ; a second PNP transistor 16 having its emitter connected to the point T, and its collector to the base of transistor 15; and a resistor 17 between the collector of the transistor 16 and supply line V.sub.CC. The base of transistor 16 is controlled by a MOS transistor 42, which provides for enabling the whole of unit 26 during the hold phase.
The control device 1 also comprises an input comparator 30 having its non-inverting input connected to an input terminal 31 of the device 1 for receiving injection control signal IN; and its inverting input connected to a source 32 supplying a reference voltage V.sub.R. The output of comparator 30 drives a MOS control transistor 33 having its source terminal grounded, and its drain terminal connected to the gate of transistor 22. The output of comparator 30 is also connected to the drain terminal of a further MOS transistor 34, the source terminal of which is grounded, and the gate terminal of which is connected to an output Q of a storage element or flip-flop 35. The flip-flop 35 has an input S connected to the output of an OR logic circuit 36 having two inputs connected respectively to the outputs of the comparators 5 and 6.
The output of the comparator 7 is connected to the set input S of a second flip-flop 38 and to the drain terminal of a MOS transistor 39, the source terminal of which is grounded, and the gate terminal of which is connected to an inverted output Q of a further flip-flop 50. The flip-flop 50 has a set input S connected to the output of comparator 5, and its reset input R receiving the inverted value of injection control signal IN.
A reset input R of flip-flop 38 is also connected to the inverted value of injection control signal IN, while an output Q is connected to the gate terminal of the MOS transistor 42, the source terminal of which is grounded, and the drain terminal of which is connected to the base of transistor 16 of recirculating unit 26. The output of the flip-flop 38 is also connected, via an invertor 44, to the gate terminal of a MOS transistor 45, the source terminal of which is grounded, and the drain terminal of which is connected to the output of comparator 6.
The output Q of the flip-flop 38 is also connected to a first input of an AND circuit 46, the other input of which is connected to the output of flip-flop 35. Via a delay element or timer 47, e.g., a capacitive type, the output of circuit 46 is connected to one input of an OR logic circuit 48 having a second input receiving the inverted value of injection control signal IN, and a third input connected to the output of comparator 7. Finally, the output of the OR circuit 48 is connected to the reset input of flip-flop 35.
At the start of operation of device 1, when the signal IN is low, the flip-flop 38 is reset so that its output is low, and the transistor 45 is on, thus maintaining a low output of the comparator 6. Similarly, the flip-flop 50 is reset, the transistor 39 is on, and the output of comparator 7 maintained low. Also, the flip-flop 35 is reset via the OR logic circuit 48, thus maintaining transistor 34 off, and the output of the comparator 30 is low, thus maintaining the switch 2 open, so that no current flows through the inductor L.
As soon as signal IN switches to high (instant t.sub.0), comparator 30 switches so as to turn on the transistor 33, and consequently transistor 22, and to close switch 2. Inductor L is thus connected between the supply V.sub.CC and ground, and begins conducting an increasing current. When the current in the inductor reaches peak value I.sub.P (instant t.sub.1), the comparator 5 switches to high, thus switching the flip-flop 50, which in turn switches off the transistor 39, thus releasing the output of comparator 7, which nevertheless remains low. Switching of comparator 5 also switches flip-flop 35, which turns on the transistor 34, thus turning off transistors 33, 22 and opening switch 2, so that the voltage V.sub.L at the terminals of inductor L rises rapidly to such a value as to turn on the transistor 20 and Zener diode 18.
The recirculating branch formed by the transistor 20 and diode 18 locks the voltage at the terminals of inductor L to the value at which components 20, 18 are on, so that current I.sub.L falls steadily, as shown in FIG. 1 (interval t.sub.1 -t.sub.2).
At instant t.sub.2, comparator 7, upon detecting the voltage V.sub.3, i.e., corresponding to the current I.sub.HL through resistor 3, switches to high, thus switching the output Q of the flip-flop 38 to high. This in turn switches on the transistor 42, thus enabling the low voltage recirculating circuit including the unit 26; and turns off the transistor 45, thus releasing the output of comparator 6, which nevertheless remains low. Via the OR circuit 48, the high signal at the output of comparator 7 also resets flip-flop 35, output Q of which switches to low, thus turning off transistor 34 and turning on transistor 22 and switch 2, so that the current in inductor L rises.
The current in the inductor therefore continues rising until it reaches value I.sub.HH (instant t.sub.3), at which point, the output of comparator 6 switches to high, thus switching the output Q of flip-flop 35 once more to high, and turns off transistors 33, 22 and switch 2. The opening of switch 2 again causes an increase in the voltage at point T, which, in this case, rises high enough to start recirculating unit 26. The current therefore decreases through unit 26, but, since the voltage is not sufficient for turn on again the recirculating branch including the transistor 20 and diode 18, and therefore to close switch 2, the recirculating current does not flow through resistor 3. The end of this phase is determined by the switching of the timer 47, which, enabled by circuit 46 receiving two high input signals, after a given time period (which is required for lowering current I.sub.L to roughly the I.sub.HL value) resets flip-flop 35, thus turning off transistor 34 and closing switch 2 (instant t.sub.4).
The current in the inductor L therefore increases once more, as following instant t.sub.2, and the hold phase continues in this way, supplying the inductor with a hold current oscillating between I.sub.HH and I.sub.HL, thus ensuring that the injector valve remains open.
One problem on the above known circuit, therefore, is that short-circuiting may occur in either the peak or hold phase, both of which result in an increase in the current of sensing resistor 3, the value of which, however, differs according to the operating phase. Though the presence of a short-circuit does in fact switch the comparator 5 or 6 (depending on the operating phase), drawbacks are incurred as a result of the delay introduced by the circuit. In the event of short-circuiting in the peak phase, in particular, comparator 5 switches, thus switching circuit 36, flip-flop 35, transistors 34, 33, 22, and switch 2, as following instant t.sub.1 under normal operating conditions. The delay in the interruption of the current supply for opening switch 2 results in an increase in current, which is difficult to evaluate, and depends on both the load and the value of the supply voltage. Under normal operating conditions (no short-circuiting), the inductive load results in an exponential increase, whereas, in the presence of a short-circuit, the current increases faster, i.e., rises to a higher value over a given time period. Moreover, the difference between the set peak value (I.sub.P) and the actual value at which the switch 2 is opened (start of the high voltage recirculating phase) depends on the feedback time of the loop and the speed at which the current increases. This difference is not always easy to determine accurately and, though negligible under normal operating conditions, is not so in the event of a short-circuit.
The short-circuit is therefore difficult to define, depending as it does on the operating phase of the device, and being higher in the peak phase as compared with the hold phase.
It is an object of the present invention to provide a straightforward, reliable, compact circuit for detecting short-circuiting of a drive device of the aforementioned type.